The present invention relates generally to the field of instrumentation, and more particularly to dynamically instrumenting object code based on errors detected at runtime.
Instrumentation refers to an ability to monitor or measure the level of a product's performance, to diagnose errors and to write trace information. Instrumentation may be implemented in the form of code instructions that monitor specific components in a system, for example, instructions may output logging information to appear on screen.
Dynamic verification is a process by which a program discovers errors that occur when a program runs. Static verification, or static code analysis, by contrast, involves detecting errors in the source code without ever compiling or running it, but rather, by just discovering logical inconsistencies. Dynamic verification is done at runtime.
Reduced instruction set computing (RISC) is a central processing unit (CPU) design strategy based on the insight that a simplified instruction set, as opposed to a complex set, provides higher performance when combined with a microprocessor architecture capable of executing those instructions using fewer microprocessor cycles per instruction. Typically, RISC processors use a small, highly optimized set of instructions, rather than a more versatile set of instructions often found in other types of architectures. RISC processors typically have a uniform instruction format, or fixed length instructions, and may have long range unconditional branches.